1. Field of the Invention
The present invention relates to a semiconductor testing apparatus which is used for simultaneous measuring of the characteristics of a plurality semiconductor devices.
2. Description of Related Art
A conventional semiconductor testing apparatus, as shown in FIG. 4 and FIG. 5, will be explained below. In both figures, low DC voltage transformers A, A1, A2 are provided in main body 7 and transform an AC voltage 200 V into the desired DC voltage. Pin electronic circuits D, D1, D2 supply test signals to each of the semiconductor devices E, E1, E2, and are disposed on a card. Connectors 56 to 61, which are provided on the card, are connected to connectors 5 and 51 to 55, respectively, which are provided on the backboard C.
Further, connectors 3, 31, 32 are provided at the place corresponding to each of the connectors 5, 52, 54 on the back side of the backboard C, to be connected to each of the connectors 5, 52, 54 via circuit patterns 6, 63, 64 on the surface of the backboard C. Test station 8 is comprised of the backboard C, and pin electronic circuit D, D1, D2 which are on the backboard C. In addition, the connectors 3, 31, 32 are connected to the connectors 1, 11, 12 respectively via power cables 2, 21, 22, and the connectors 1, 11, 12 are connected to the connectors 1a, 11a, 12a which are used as the output terminals for the low DC voltage transformers A, A1, A2.
In the conventional semiconductor testing apparatus described above, AC 200 V voltage is transformed into low DC voltages which are required by each of the pin electronic circuits D, D1, D2, and the low DC voltages are transmitted to the power cables 2, 21, 22 via connectors 1a, 11a, 12a and connectors 1, 11, 12. Finally, the low DC voltages are sent to each of the pin electronic circuit D, D1, D2 sequentially and respectively via connectors 3, 31, 32; circuit patterns 6, 63, 64 on the surface of the backboard C; connectors 5, 52, 54 and connectors 56, 58, 60. The connections enable each of the pin electronic circuits D, D1, D2 to supply the testing signals corresponding to each of the semiconductor devices E, E1, E2.
However, there is a problem that in the conventional semiconductor testing apparatus power supplies (for example, different power voltages such as +/-5 V or -2 V) or low DC voltage transformers A, A1, A2 which correspond to the power currents (required currents at each power voltage, such as 10A at +5 V) must be individually arranged.
Another problem in the conventional semiconductor testing apparatus is that the current which is required by the test station 8 increases as the number of semiconductor devices E, E1, E2 being tested increases. Additionally, because of this, a new low DC voltage transformer with a large current capacity is required, and the number and current capacity of the connectors 1, 11, 12; power cables 2, 21, 22; and connectors 3, 31, 32 on the backboard C must be increased. The increase in these power cables 2, 21, 22 prevents the improvement in operation of the test station 8 on the semiconductor testing apparatus and increases layout space for the semiconductor testing apparatus. Also, in the case of the decreasing of the number of semiconductor devices E, E1, E2 being tested at the test station 8, it is difficult in the conventional apparatus to eliminate the low DC voltage transformer A, A1, A2 because those power circuits are shared by each of the pin electronic circuits D, D1, D2.